generated from sirlilpanda/kicad-project-template-actionless
updated bom and finished pcb
This commit is contained in:
sirlilpanda
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M48
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; DRILL file KiCad 10.0.0 date 2026-04-15T11:03:58
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FMAT,2
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M48
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FMAT,2
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X113.467Y-65.063
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X118.892Y-121.0
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X138.25Y-53.9
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X138.25Y-60.4
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X138.25Y-63.4
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X138.511Y-118.3
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X138.511Y-119.0
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X138.511Y-119.7
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X139.161Y-120.4
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X139.161Y-121.0
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X139.25Y-52.9
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X139.25Y-53.9
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X139.25Y-59.4
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X139.25Y-60.4
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X139.25Y-61.4
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X139.25Y-62.4
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X139.25Y-63.4
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X140.0Y-116.3
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X140.0Y-117.0
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X140.0Y-117.8
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X140.0Y-119.4
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X140.0Y-121.0
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X140.25Y-52.9
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X140.25Y-53.9
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X140.25Y-59.4
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X140.25Y-61.4
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X140.25Y-63.4
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X140.35Y-115.65
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X140.7Y-117.8
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X141.15Y-115.65
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X141.25Y-52.9
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X141.25Y-53.9
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X141.25Y-60.4
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X141.4Y-117.0
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X141.4Y-117.8
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X141.4Y-118.6
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X142.1Y-119.4
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X142.1Y-121.0
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X142.25Y-52.9
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X142.25Y-53.9
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X142.25Y-59.4
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X142.4Y-116.3
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X142.6Y-111.8
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X143.2Y-113.6
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X165.75Y-62.4
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X166.75Y-52.9
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X166.75Y-53.9
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X167.75Y-52.9
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X167.75Y-53.9
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X167.75Y-60.4
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X167.75Y-61.4
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X167.75Y-62.4
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X167.75Y-63.4
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X168.75Y-53.9
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X168.75Y-59.4
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X168.75Y-60.4
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X168.75Y-61.4
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X168.75Y-62.4
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X168.75Y-52.9
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X169.344Y-111.025
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X169.75Y-53.9
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X169.75Y-59.4
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X169.75Y-60.4
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X169.75Y-61.4
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X169.75Y-62.4
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X170.344Y-106.725
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X170.344Y-107.325
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X170.75Y-52.9
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X170.75Y-53.9
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X170.75Y-59.4
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X170.75Y-60.4
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X170.75Y-61.4
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X170.75Y-63.4
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X171.744Y-97.374
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X171.75Y-62.4
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X171.75Y-52.9
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X171.75Y-53.9
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X171.75Y-59.4
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X171.75Y-60.4
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X171.75Y-61.4
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X171.75Y-63.4
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X174.75Y-61.4
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X174.75Y-62.4
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X174.75Y-63.4
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X174.924Y-120.305
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X175.3Y-79.4
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X175.3Y-80.1
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X175.3Y-80.8
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X195.0Y-81.7
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X195.0Y-82.4
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X195.0Y-83.1
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X195.195Y-120.305
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X195.25Y-56.75
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X195.25Y-57.5
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X195.25Y-58.25
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X202.0Y-61.25
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X202.0Y-62.0
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X202.0Y-62.75
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X202.0Y-62.75
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X202.0Y-63.5
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X202.0Y-64.25
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X202.0Y-65.0
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BIN
PCBs/esp32-racer.zip
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BIN
PCBs/esp32-racer.zip
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Binary file not shown.
25839
PCBs/old/esp32-racer-B_Cu.gbr
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25839
PCBs/old/esp32-racer-B_Cu.gbr
Normal file
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PCBs/old/esp32-racer-B_Mask.gbr
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1,1,$1+$1,$4,$5*
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X77360000Y-126215000D03*
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X52503750Y-78124999D03*
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X52503750Y-77175000D03*
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X54778750Y-78124999D03*
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X127662500Y-68500000D03*
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X127662500Y-67550001D03*
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D37*
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%TO.C,C12*%
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X50270000Y-103592500D03*
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X105251992Y-55251992D03*
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X106348008Y-56348008D03*
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%TD*%
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D34*
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%TO.C,D8*%
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X114600000Y-56212500D03*
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X116500000Y-56212500D03*
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X115550000Y-58087501D03*
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%TD*%
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D35*
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%TO.C,U16*%
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X146262500Y-116799998D03*
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X146262500Y-115849999D03*
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X146262500Y-114900000D03*
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X148537500Y-115849999D03*
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X148537500Y-116799998D03*
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D38*
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X186750000Y-77729412D03*
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X187250001Y-77729412D03*
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X187750000Y-77729412D03*
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X188750000Y-77729412D03*
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X188249999Y-82129412D03*
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X187750000Y-82129412D03*
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X187250001Y-82129412D03*
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X186750000Y-82129412D03*
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D30*
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X97400000Y-55400000D03*
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X98496016Y-56496016D03*
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D35*
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X94662500Y-122400000D03*
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D28*
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M02*
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208
PCBs/old/esp32-racer-B_Paste.gbr
Normal file
208
PCBs/old/esp32-racer-B_Paste.gbr
Normal file
@@ -0,0 +1,208 @@
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%TF.GenerationSoftware,KiCad,Pcbnew,10.0.0*%
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%TF.CreationDate,2026-04-15T11:42:02+12:00*%
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%TF.FileFunction,Paste,Bot*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 10.0.0) date 2026-04-15 11:42:02*
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%MOMM*%
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||||
%LPD*%
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||||
G01*
|
||||
G04 APERTURE LIST*
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G04 Aperture macros list*
|
||||
%AMRoundRect*
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||||
0 Rectangle with rounded corners*
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||||
0 $1 Rounding radius*
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||||
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
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||||
0 Add a 4 corners polygon primitive as box body*
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||||
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
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||||
0 Add four circle primitives for the rounded corners*
|
||||
1,1,$1+$1,$2,$3*
|
||||
1,1,$1+$1,$4,$5*
|
||||
1,1,$1+$1,$6,$7*
|
||||
1,1,$1+$1,$8,$9*
|
||||
0 Add four rect primitives between the rounded corners*
|
||||
20,1,$1+$1,$2,$3,$4,$5,0*
|
||||
20,1,$1+$1,$4,$5,$6,$7,0*
|
||||
20,1,$1+$1,$6,$7,$8,$9,0*
|
||||
20,1,$1+$1,$8,$9,$2,$3,0*%
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||||
G04 Aperture macros list end*
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||||
%ADD10RoundRect,0.150000X0.512500X0.150000X-0.512500X0.150000X-0.512500X-0.150000X0.512500X-0.150000X0*%
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%ADD11RoundRect,0.200000X0.275000X-0.200000X0.275000X0.200000X-0.275000X0.200000X-0.275000X-0.200000X0*%
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||||
%ADD13RoundRect,0.140000X-0.170000X0.140000X-0.170000X-0.140000X0.170000X-0.140000X0.170000X0.140000X0*%
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||||
%ADD14RoundRect,0.225000X0.225000X0.250000X-0.225000X0.250000X-0.225000X-0.250000X0.225000X-0.250000X0*%
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%ADD16RoundRect,0.150000X-0.150000X0.587500X-0.150000X-0.587500X0.150000X-0.587500X0.150000X0.587500X0*%
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%ADD17RoundRect,0.150000X-0.512500X-0.150000X0.512500X-0.150000X0.512500X0.150000X-0.512500X0.150000X0*%
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||||
%ADD18RoundRect,0.150000X0.150000X-0.587500X0.150000X0.587500X-0.150000X0.587500X-0.150000X-0.587500X0*%
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%ADD19RoundRect,0.225000X-0.250000X0.225000X-0.250000X-0.225000X0.250000X-0.225000X0.250000X0.225000X0*%
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||||
%ADD20RoundRect,0.075000X-0.075000X0.650000X-0.075000X-0.650000X0.075000X-0.650000X0.075000X0.650000X0*%
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||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
%TO.C,D27*%
|
||||
X57137500Y-64650001D03*
|
||||
X57137500Y-65600000D03*
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X57137500Y-66549999D03*
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X54862500Y-66549999D03*
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X54862500Y-64650001D03*
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%TD*%
|
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D11*
|
||||
%TO.C,R9*%
|
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X51770000Y-105192500D03*
|
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X51770000Y-103542500D03*
|
||||
%TD*%
|
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|
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|
||||
X63700000Y-125450001D03*
|
||||
X63700000Y-126400000D03*
|
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X63700000Y-127349999D03*
|
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X61425000Y-127349999D03*
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X61425000Y-125450001D03*
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%TD*%
|
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D12*
|
||||
%TO.C,C17*%
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X82551992Y-55076992D03*
|
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X83648008Y-56173008D03*
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||||
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|
||||
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|
||||
%TO.C,C94*%
|
||||
X150000000Y-114840000D03*
|
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X150000000Y-115800000D03*
|
||||
%TD*%
|
||||
D14*
|
||||
%TO.C,C92*%
|
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X189472382Y-85479411D03*
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X187922382Y-85479411D03*
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%TD*%
|
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D13*
|
||||
%TO.C,C93*%
|
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X127200000Y-70470000D03*
|
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X127200000Y-71430000D03*
|
||||
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|
||||
D15*
|
||||
%TO.C,D15*%
|
||||
X177800001Y-85620000D03*
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X173799999Y-85620000D03*
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|
||||
D16*
|
||||
%TO.C,D37*%
|
||||
X75460000Y-126215000D03*
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X77360000Y-126215000D03*
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X76410000Y-128090001D03*
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||||
%TD*%
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D17*
|
||||
%TO.C,D10*%
|
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X52503750Y-78124999D03*
|
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X52503750Y-77175000D03*
|
||||
X52503750Y-76225001D03*
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||||
X54778750Y-76225001D03*
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X54778750Y-78124999D03*
|
||||
%TD*%
|
||||
D18*
|
||||
%TO.C,D36*%
|
||||
X77350000Y-123540000D03*
|
||||
X75450000Y-123540000D03*
|
||||
X76400000Y-121664999D03*
|
||||
%TD*%
|
||||
D17*
|
||||
%TO.C,D31*%
|
||||
X61242500Y-59350000D03*
|
||||
X61242500Y-58400001D03*
|
||||
X61242500Y-57450002D03*
|
||||
X63517500Y-57450002D03*
|
||||
X63517500Y-59350000D03*
|
||||
%TD*%
|
||||
D14*
|
||||
%TO.C,C91*%
|
||||
X189472382Y-83929412D03*
|
||||
X187922382Y-83929412D03*
|
||||
%TD*%
|
||||
D12*
|
||||
%TO.C,C15*%
|
||||
X90101992Y-55201992D03*
|
||||
X91198008Y-56298008D03*
|
||||
%TD*%
|
||||
D10*
|
||||
%TO.C,D26*%
|
||||
X57137500Y-61250001D03*
|
||||
X57137500Y-62200000D03*
|
||||
X57137500Y-63149999D03*
|
||||
X54862500Y-63149999D03*
|
||||
X54862500Y-61250001D03*
|
||||
%TD*%
|
||||
%TO.C,U17*%
|
||||
X129937500Y-67550001D03*
|
||||
X129937500Y-68500000D03*
|
||||
X129937500Y-69449999D03*
|
||||
X127662500Y-69449999D03*
|
||||
X127662500Y-68500000D03*
|
||||
X127662500Y-67550001D03*
|
||||
%TD*%
|
||||
D19*
|
||||
%TO.C,C12*%
|
||||
X50270000Y-103592500D03*
|
||||
X50270000Y-105142500D03*
|
||||
%TD*%
|
||||
D12*
|
||||
%TO.C,C19*%
|
||||
X105251992Y-55251992D03*
|
||||
X106348008Y-56348008D03*
|
||||
%TD*%
|
||||
D16*
|
||||
%TO.C,D8*%
|
||||
X114600000Y-56212500D03*
|
||||
X116500000Y-56212500D03*
|
||||
X115550000Y-58087501D03*
|
||||
%TD*%
|
||||
D17*
|
||||
%TO.C,U16*%
|
||||
X146262500Y-116799998D03*
|
||||
X146262500Y-115849999D03*
|
||||
X146262500Y-114900000D03*
|
||||
X148537500Y-114900000D03*
|
||||
X148537500Y-115849999D03*
|
||||
X148537500Y-116799998D03*
|
||||
%TD*%
|
||||
D20*
|
||||
%TO.C,U14*%
|
||||
X186750000Y-77729412D03*
|
||||
X187250001Y-77729412D03*
|
||||
X187750000Y-77729412D03*
|
||||
X188249999Y-77729412D03*
|
||||
X188750000Y-77729412D03*
|
||||
X188750000Y-82129412D03*
|
||||
X188249999Y-82129412D03*
|
||||
X187750000Y-82129412D03*
|
||||
X187250001Y-82129412D03*
|
||||
X186750000Y-82129412D03*
|
||||
%TD*%
|
||||
D12*
|
||||
%TO.C,C18*%
|
||||
X97400000Y-55400000D03*
|
||||
X98496016Y-56496016D03*
|
||||
%TD*%
|
||||
D17*
|
||||
%TO.C,D28*%
|
||||
X94662500Y-123349999D03*
|
||||
X94662500Y-122400000D03*
|
||||
X94662500Y-121450001D03*
|
||||
X96937500Y-121450001D03*
|
||||
X96937500Y-123349999D03*
|
||||
%TD*%
|
||||
D12*
|
||||
%TO.C,C16*%
|
||||
X74651992Y-55251992D03*
|
||||
X75748008Y-56348008D03*
|
||||
%TD*%
|
||||
D10*
|
||||
%TO.C,D29*%
|
||||
X91137500Y-121350001D03*
|
||||
X91137500Y-122300000D03*
|
||||
X91137500Y-123249999D03*
|
||||
X88862500Y-123249999D03*
|
||||
X88862500Y-121350001D03*
|
||||
%TD*%
|
||||
M02*
|
||||
10482
PCBs/old/esp32-racer-B_Silkscreen.gbr
Normal file
10482
PCBs/old/esp32-racer-B_Silkscreen.gbr
Normal file
File diff suppressed because it is too large
Load Diff
40
PCBs/old/esp32-racer-Edge_Cuts.gbr
Normal file
40
PCBs/old/esp32-racer-Edge_Cuts.gbr
Normal file
@@ -0,0 +1,40 @@
|
||||
%TF.GenerationSoftware,KiCad,Pcbnew,10.0.0*%
|
||||
%TF.CreationDate,2026-04-15T11:42:03+12:00*%
|
||||
%TF.ProjectId,esp32-racer,65737033-322d-4726-9163-65722e6b6963,rev?*%
|
||||
%TF.SameCoordinates,Original*%
|
||||
%TF.FileFunction,Profile,NP*%
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW 10.0.0) date 2026-04-15 11:42:03*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G01*
|
||||
G04 APERTURE LIST*
|
||||
%TA.AperFunction,Profile*%
|
||||
%ADD10C,0.050000*%
|
||||
%TD*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X47000000Y-56000000D02*
|
||||
X47000000Y-56000000D01*
|
||||
G75*
|
||||
G02*
|
||||
X51000000Y-52000000I4000000J0D01*
|
||||
G01*
|
||||
X202999999Y-52000000D01*
|
||||
G75*
|
||||
G02*
|
||||
X206999999Y-56000000I1J-4000000D01*
|
||||
G01*
|
||||
X206999999Y-128000000D01*
|
||||
G75*
|
||||
G02*
|
||||
X202999999Y-132000000I-3999999J0D01*
|
||||
G01*
|
||||
X51000000Y-132000000D01*
|
||||
G75*
|
||||
G02*
|
||||
X47000000Y-128000000I0J4000000D01*
|
||||
G01*
|
||||
X47000000Y-56000000D01*
|
||||
M02*
|
||||
BIN
PCBs/old/esp32-racer-Edge_Cuts.zip
Normal file
BIN
PCBs/old/esp32-racer-Edge_Cuts.zip
Normal file
Binary file not shown.
41322
PCBs/old/esp32-racer-F_Cu.gbr
Normal file
41322
PCBs/old/esp32-racer-F_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
2095
PCBs/old/esp32-racer-F_Mask.gbr
Normal file
2095
PCBs/old/esp32-racer-F_Mask.gbr
Normal file
File diff suppressed because it is too large
Load Diff
1847
PCBs/old/esp32-racer-F_Paste.gbr
Normal file
1847
PCBs/old/esp32-racer-F_Paste.gbr
Normal file
File diff suppressed because it is too large
Load Diff
BIN
PCBs/old/esp32-racer-F_Paste.zip
Normal file
BIN
PCBs/old/esp32-racer-F_Paste.zip
Normal file
Binary file not shown.
34892
PCBs/old/esp32-racer-F_Silkscreen.gbr
Normal file
34892
PCBs/old/esp32-racer-F_Silkscreen.gbr
Normal file
File diff suppressed because it is too large
Load Diff
28961
PCBs/old/esp32-racer-In1_Cu.gbr
Normal file
28961
PCBs/old/esp32-racer-In1_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
70914
PCBs/old/esp32-racer-In2_Cu.gbr
Normal file
70914
PCBs/old/esp32-racer-In2_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
17
PCBs/old/esp32-racer-NPTH.drl
Normal file
17
PCBs/old/esp32-racer-NPTH.drl
Normal file
@@ -0,0 +1,17 @@
|
||||
M48
|
||||
; DRILL file KiCad 10.0.0 date 2026-04-15T11:42:13
|
||||
; FORMAT={-:-/ absolute / metric / decimal}
|
||||
; #@! TF.CreationDate,2026-04-15T11:42:13+12:00
|
||||
; #@! TF.GenerationSoftware,Kicad,Pcbnew,10.0.0
|
||||
; #@! TF.FileFunction,NonPlated,1,4,NPTH
|
||||
FMAT,2
|
||||
METRIC
|
||||
; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
|
||||
T1C0.650
|
||||
%
|
||||
G90
|
||||
G05
|
||||
T1
|
||||
X73.51Y-125.025
|
||||
X79.29Y-125.025
|
||||
M30
|
||||
2400
PCBs/old/esp32-racer-PTH.drl
Normal file
2400
PCBs/old/esp32-racer-PTH.drl
Normal file
File diff suppressed because it is too large
Load Diff
170
PCBs/old/esp32-racer-job.gbrjob
Normal file
170
PCBs/old/esp32-racer-job.gbrjob
Normal file
@@ -0,0 +1,170 @@
|
||||
{
|
||||
"Header": {
|
||||
"GenerationSoftware": {
|
||||
"Vendor": "KiCad",
|
||||
"Application": "Pcbnew",
|
||||
"Version": "10.0.0"
|
||||
},
|
||||
"CreationDate": "2026-04-15T11:42:03+12:00"
|
||||
},
|
||||
"GeneralSpecs": {
|
||||
"ProjectId": {
|
||||
"Name": "esp32-racer",
|
||||
"GUID": "65737033-322d-4726-9163-65722e6b6963",
|
||||
"Revision": "rev?"
|
||||
},
|
||||
"Size": {
|
||||
"X": 160.05,
|
||||
"Y": 80.05
|
||||
},
|
||||
"LayerNumber": 4,
|
||||
"BoardThickness": 1.6,
|
||||
"Finish": "None"
|
||||
},
|
||||
"DesignRules": [
|
||||
{
|
||||
"Layers": "Outer",
|
||||
"PadToPad": 0.2,
|
||||
"PadToTrack": 0.2,
|
||||
"TrackToTrack": 0.2,
|
||||
"MinLineWidth": 0.2,
|
||||
"TrackToRegion": 0.2,
|
||||
"RegionToRegion": 0.2
|
||||
},
|
||||
{
|
||||
"Layers": "Inner",
|
||||
"PadToPad": 0.0,
|
||||
"PadToTrack": 0.0,
|
||||
"TrackToTrack": 0.2,
|
||||
"MinLineWidth": 0.2,
|
||||
"TrackToRegion": 0.2,
|
||||
"RegionToRegion": 0.2
|
||||
}
|
||||
],
|
||||
"FilesAttributes": [
|
||||
{
|
||||
"Path": "esp32-racer-F_Cu.gbr",
|
||||
"FileFunction": "Copper,L1,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-In1_Cu.gbr",
|
||||
"FileFunction": "Copper,L2,Inr",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-In2_Cu.gbr",
|
||||
"FileFunction": "Copper,L3,Inr",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-B_Cu.gbr",
|
||||
"FileFunction": "Copper,L4,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-F_Paste.gbr",
|
||||
"FileFunction": "SolderPaste,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-B_Paste.gbr",
|
||||
"FileFunction": "SolderPaste,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-F_Silkscreen.gbr",
|
||||
"FileFunction": "Legend,Top",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-B_Silkscreen.gbr",
|
||||
"FileFunction": "Legend,Bot",
|
||||
"FilePolarity": "Positive"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-F_Mask.gbr",
|
||||
"FileFunction": "SolderMask,Top",
|
||||
"FilePolarity": "Negative"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-B_Mask.gbr",
|
||||
"FileFunction": "SolderMask,Bot",
|
||||
"FilePolarity": "Negative"
|
||||
},
|
||||
{
|
||||
"Path": "esp32-racer-Edge_Cuts.gbr",
|
||||
"FileFunction": "Profile",
|
||||
"FilePolarity": "Positive"
|
||||
}
|
||||
],
|
||||
"MaterialStackup": [
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Name": "Top Silk Screen"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Name": "Top Solder Paste"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.01,
|
||||
"Name": "Top Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "F.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Thickness": 0.1,
|
||||
"Material": "FR4",
|
||||
"Name": "F.Cu/In1.Cu",
|
||||
"Notes": "Type: dielectric layer 1 (from F.Cu to In1.Cu)"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "In1.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Thickness": 1.24,
|
||||
"Material": "FR4",
|
||||
"Name": "In1.Cu/In2.Cu",
|
||||
"Notes": "Type: dielectric layer 2 (from In1.Cu to In2.Cu)"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "In2.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Thickness": 0.1,
|
||||
"Material": "FR4",
|
||||
"Name": "In2.Cu/B.Cu",
|
||||
"Notes": "Type: dielectric layer 3 (from In2.Cu to B.Cu)"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "B.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.01,
|
||||
"Name": "Bottom Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Name": "Bottom Solder Paste"
|
||||
},
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Name": "Bottom Silk Screen"
|
||||
}
|
||||
]
|
||||
}
|
||||
BIN
PCBs/old/esp32-racer.zip
Normal file
BIN
PCBs/old/esp32-racer.zip
Normal file
Binary file not shown.
Reference in New Issue
Block a user