From 4faf18c8e61b953d66cd69a398a7398dc76a15d4 Mon Sep 17 00:00:00 2001
From: sirlilpanda <33928689+sirlilpanda@users.noreply.github.com>
Date: Tue, 19 Aug 2025 14:56:23 +1200
Subject: [PATCH] added netclass colours

---
 Hardware/10MHz-amp/10MHz-amp.kicad_pro | 55 +++++++++++++++++++++++++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/Hardware/10MHz-amp/10MHz-amp.kicad_pro b/Hardware/10MHz-amp/10MHz-amp.kicad_pro
index a58f09f..131f6b8 100644
--- a/Hardware/10MHz-amp/10MHz-amp.kicad_pro
+++ b/Hardware/10MHz-amp/10MHz-amp.kicad_pro
@@ -472,6 +472,34 @@
         "via_diameter": 0.6,
         "via_drill": 0.3,
         "wire_width": 6
+      },
+      {
+        "line_style": 0,
+        "name": "GND",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 1,
+        "schematic_color": "rgb(132, 132, 132)"
+      },
+      {
+        "line_style": 0,
+        "name": "HIGH_FREQ",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 0,
+        "schematic_color": "rgb(255, 255, 0)"
+      },
+      {
+        "line_style": 0,
+        "name": "POWER+",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 3,
+        "schematic_color": "rgb(255, 0, 0)"
+      },
+      {
+        "line_style": 0,
+        "name": "POWER-",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 2,
+        "schematic_color": "rgb(0, 0, 194)"
       }
     ],
     "meta": {
@@ -479,7 +507,32 @@
     },
     "net_colors": null,
     "netclass_assignments": null,
-    "netclass_patterns": []
+    "netclass_patterns": [
+      {
+        "netclass": "POWER+",
+        "pattern": "^\\+[V|.|v]*.+[V|v]*"
+      },
+      {
+        "netclass": "POWER-",
+        "pattern": "^\\-[V|.|v]*.+[V|v]*"
+      },
+      {
+        "netclass": "HIGH_FREQ",
+        "pattern": "*HS"
+      },
+      {
+        "netclass": "GND",
+        "pattern": "*GND*"
+      },
+      {
+        "netclass": "POWER+",
+        "pattern": "*VCC"
+      },
+      {
+        "netclass": "POWER-",
+        "pattern": "*VS*"
+      }
+    ]
   },
   "pcbnew": {
     "last_paths": {