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• 9f4ce14d35 fixed feature size master sirlilpanda 2026-02-26 11:23:07 +13:00
• 9918d2b064 autogen sirlilpanda 2026-02-26 09:48:45 +13:00
• d499fff5cc changed output file name from waferlayout to something more discriptive sirlilpanda 2026-02-26 09:48:26 +13:00
• 91f84fb78a fixed comment line sirlilpanda 2026-02-25 23:02:33 +13:00
• 129a5b5d3d autogened sirlilpanda 2026-02-25 23:02:22 +13:00
• 67a76eff07 makefile for compling all dxfs sirlilpanda 2026-02-25 23:02:11 +13:00
• 8ae175e08c added the smallest unit value to the ploygon in order to ensure they overlap and union correctly sirlilpanda 2026-02-25 21:59:26 +13:00
• 04e1ad0d0a moved to dxfs sirlilpanda 2026-02-25 21:13:45 +13:00
• 2516378755 added more comments sirlilpanda 2026-02-25 21:13:25 +13:00
• f94a6d137e new wafer layout and update the comments on some others sirlilpanda 2026-02-25 21:13:05 +13:00
• 7526d8d2a1 added more comments to explain each part sirlilpanda 2026-02-25 21:12:37 +13:00
• 21ed153977 some preset dxfs to use sirlilpanda 2026-02-25 21:12:09 +13:00
• f3216a74db updated image location sirlilpanda 2026-02-23 21:02:42 +13:00
• bdc5bbbd6a make sure that wafer doesnt appear in the final design sirlilpanda 2026-02-23 21:02:30 +13:00
• 7382cca207 basic readme sirlilpanda 2026-02-23 21:01:55 +13:00
• 79fa5c8237 custom layout for the wafers sirlilpanda 2026-02-23 20:47:58 +13:00
• f65383ef28 these are all the common params that each wafer layout may need, these will change in the future sirlilpanda 2026-02-23 20:47:39 +13:00
• ab7024b46a dir of save params sirlilpanda 2026-02-23 20:47:04 +13:00
• 3a634cdb18 refactored files add some new ones sirlilpanda 2026-02-23 20:46:02 +13:00
• ade276e1ec refactored in to other files sirlilpanda 2026-02-23 20:45:45 +13:00
• 446890d958 fairly happy sirlilpanda 2026-02-23 17:52:12 +13:00
• 07d67fb0ae init sirlilpanda 2026-02-23 17:04:19 +13:00