14 Commits

Author SHA1 Message Date
fd9c35f04b Select signal MOSFETs, incorp into sim 2025-12-29 18:15:26 +13:00
14b0ff8470 Verify battery control circuit design 2025-12-29 16:43:50 +13:00
093fed0e19 Rework symbols for battery protection and monitor ICs 2025-12-29 14:05:38 +13:00
4a8571fef6 Add battery monitor and RVP,TVS,fuse protection, rework charge control circuit to CMOS based 2025-12-29 12:39:29 +13:00
94f11e6cd3 Correct ESD selection to avoid short on VBUS, add USB sns div 2025-12-29 10:58:51 +13:00
dd15d3add9 Add hardware interlock to charger enable, rename battery control circuit sheet 2025-12-28 10:39:07 +13:00
c32b639c88 Consolidate USB front end TVS protection, add ideal diode to stop reverse sneak path 2025-12-28 10:24:30 +13:00
8f6be05874 Testbench for ideal diode controller 2025-12-27 21:40:52 +13:00
6be601b13e Further notes on power options, needs 2025-12-27 19:28:42 +13:00
a11a4745ba Prototype form of control circuitry" 2025-12-27 18:59:26 +13:00
20fcaffe84 Main battery management and regulation path, control circuits remain 2025-12-27 16:23:02 +13:00
4b016c6fec Concept for power management 2025-12-27 13:11:11 +13:00
cd08765ac6 start of keyboard controller
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2025-12-23 22:43:59 +13:00
92987ac6dc updated 2025-12-23 22:42:38 +13:00
19 changed files with 48006 additions and 2 deletions

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(kicad_pcb (version 20241229) (generator "pcbnew") (generator_version "9.0")
)

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(kicad_sch
(version 20250114)
(generator "eeschema")
(generator_version "9.0")
(uuid "bf56d128-5d7e-4ef0-a7c8-6b5949458edb")
(paper "A4")
(lib_symbols)
)

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* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES")
* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY
* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF
* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED,
* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT,
* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH
* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY
* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER
* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES,
* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM
* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.
*---------- 2N7002 Spice Model ----------
.SUBCKT N7002 10 20 30
* TERMINALS: D G S
M1 1 2 3 3 NMOS L = 1E-006 W = 1E-006
RD 10 1 0.976
RS 30 3 0.001
RG 20 2 160.6
CGS 2 3 2E-011
EGD 12 0 2 1 1
VFB 14 0 0
FFB 2 1 VFB 1
CGD 13 14 5.9E-011
R1 13 0 1
D1 12 13 DLIM
DDG 15 14 DCGD
R2 12 15 1
D2 15 0 DLIM
DSD 3 10 DSUB
.MODEL NMOS NMOS LEVEL = 3 VMAX = 1E+006 ETA = 0 VTO = 2.154
+ TOX = 6E-008 NSUB = 1E+016 KP = 0.4654 KAPPA = 1E-015 U0 = 400
.MODEL DCGD D CJO = 1.2E-011 VJ = 0.6 M = 0.6
.MODEL DSUB D IS = 6.808E-010 N = 1.576 RS = 0.1408 BV = 72 CJO = 8E-012 VJ = 0.8 M = 0.6474
.MODEL DLIM D IS = 0.0001
.ENDS
*Diodes N7002 Spice Model v0 Last Revised 2017/2/9

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* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES")
* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY
* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF
* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED,
* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT,
* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH
* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY
* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER
* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES,
* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM
* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.
*SRC=BC857BS;DI_BC857BS;BJTs PNP; Si; 45.0V 0.100A 250MHz Diodes Inc.
*BJTs - Single device of dual
.MODEL BC857 PNP (IS=10.2f NF=1.00 BF=650 VAF=121
+ IKF=42.5m ISE=2.25p NE=2.00 BR=4.00 NR=1.00
+ VAR=20.0 IKR=0.105 RE=0.715 RB=2.86 RC=0.286
+ XTB=1.5 CJE=13.3p VJE=1.10 MJE=0.500 CJC=7.80p VJC=0.300 MJC=0.300
+ TF=586p TR=95.9n EG=1.12 )
.SUBCKT BC857BS 1 2 3 4 5 6
Q_A 6 2 1 BC857
Q_B 3 5 4 BC857
.ENDS BC857BS

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* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES")
* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY
* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF
* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED,
* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT,
* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH
* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY
* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER
* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES,
* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM
* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.
*ZETEX BSS84 Spice Model v1.1 Last Revised 3/5/00
*
.SUBCKT BSS84 3 4 5
* NODES: DRAIN GATE SOURCE
M1 3 2 5 5 MOD1
RG 4 2 167
RL 3 5 50E6
C1 2 5 26P
C2 3 2 4P
D1 3 5 DIODE1
*
.MODEL MOD1 PMOS VTO=-1.709 RS=3.091 RD=0.979 IS=1E-15 KP=0.146
+CBD=12P PB=1
.MODEL DIODE1 D IS=1.072E-13 RS=0.527 N=1.077
.ENDS BSS84
*
*$
*

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{
"last_sch_text_sim_command": "",
"tabs": [
{
"analysis": "TRAN",
"commands": [
".tran 10m 80m 0",
".kicad adjustpaths",
".save all",
".probe alli",
".probe allp"
],
"dottedSecondary": true,
"margins": {
"bottom": 45,
"left": 70,
"right": 70,
"top": 30
},
"measurements": [],
"showGrid": true,
"traces": []
}
],
"user_defined_signals": [],
"version": 6
}

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{
"last_sch_text_sim_command": "",
"tabs": [
{
"analysis": "TRAN",
"commands": [
".tran 100u 10m 0",
".kicad adjustpaths",
".save all",
".probe alli",
".probe allp"
],
"dottedSecondary": true,
"margins": {
"bottom": 45,
"left": 70,
"right": 70,
"top": 30
},
"measurements": [],
"showGrid": true,
"traces": [
{
"color": "rgb(152, 78, 163)",
"signal": "V(/Ideal_Diode_Testbench/BACKWARDS_IN)",
"trace_type": 257
},
{
"color": "rgb(255, 127, 0)",
"signal": "V(/Ideal_Diode_Testbench/BACKWARDS_OUT)",
"trace_type": 257
}
]
}
],
"user_defined_signals": [],
"version": 6
}

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@@ -1,7 +1,7 @@
needs_setup: true needs_setup: false
# this is set to the name of your repo during setup, you can change it later on using the rename tool # this is set to the name of your repo during setup, you can change it later on using the rename tool
project_name: template project_name: the-shrimpt-keyboard
# this is a list of the production formats that you would like # this is a list of the production formats that you would like
# honestly only use gerbers, i doubt i will add anything else # honestly only use gerbers, i doubt i will add anything else